The silicon carbide (SiC) semiconductor has a higher withstand voltage and better heat resistance than does silicon because of its larger band gaps, and is expected to have great potential when applied to power devices.
FIGS. 11 and 12 hereof respectively show in cross-section and top plan part of a junction field-effect transistor 100 as a typical example of a SiC power device. FIG. 12 illustrates an example of a junction field-effect transistor 100 having five sources. FIG. 11 illustrates on an enlarged scale the structure in cross section taken along line B-B of FIG. 12. This junction field-effect transistor 100 is composed of a drain region 101, which is an n-type low-resistance layer; a drift region 102, which is an n-type high-resistance layer; source regions 103, which are n-type low-resistance regions; gate regions 104, which are p-type low-resistance regions formed so as to enclose the source regions; and three types of electrodes, which include a drain electrode 105, source electrodes 106, and a gate electrode 107. In this structure, a high-resistance n− layer 102 is formed by epitaxial growth on a low-resistance n+ SiC substrate (101). The substrate constitutes the drain region 101, which is one of primary electrodes. The source regions 103, which are other primary electrodes, are provided on the surface of the high-resistance n− layer 102. Each of the source electrodes 106 has a long, thin shape, and multiple source electrodes 106 are in alignment separated from each other, as shown in FIG. 12. The gate electrode 107, which is a control electrode, is provided encompassing the source electrodes 106. The electric current flowing between the source electrodes 106 and the drain electrode 105 is turned on and off by a signal applied to the gate electrode 107.
The silicon process often cannot be used without modification in the production of such SiC devices because of differences in the properties of the materials used, and development of new processing techniques is a major issue. An example is a technique for forming a p+ gate region 104 or another selectively electroconductive region in the case shown in FIG. 11. Thermal diffusion, which is commonly used with silicon, cannot be used when a gate region 104 is formed as a selectively electroconductive region. This is because the impurities in SiC used to control the conductivity of the semiconductor have a low diffusion coefficient. In view of this, ion implantation is used exclusively with SiC to form gate regions 104 as selectively electroconductive regions.
FIG. 13 is a cross-sectional view of part of a junction field-effect transistor 100 at a manufacturing stage in which the gate region is formed by ion implantation. Elements similar to those shown in FIG. 11 are denoted by the same symbols. In ion implantation, as shown in FIG. 13, a mask 109 having openings 108 is provided in advance in order to prevent impurity ions from being implanted in the SiC in regions other than the gate region 104 to be formed, and the impurity ions are then directed onto the entire surface as shown by the arrows 110, allowing the ions to be implanted only in the required areas. High implantation energy is needed to form deep gate regions, and a special mask must be prepared when it is impossible to use the mask materials and thicknesses commonly employed with conventional silicon. Available literature (Research & Development Association for Future Electron Devices, “2002 Report on the Results Commissioned by the New Energy and Industrial Technology Development Organization, Development of Ultralow-loss Power Devices Technology, Element Processing Technology”) discloses an example in which a silicon oxide film (SiO2) that has a thickness of 3.2 μm and has been formed by chemical vapor deposition (CVD) is used as a mask, and aluminum ions are used to form a gate by ion implantation at a maximum energy of 1.4 MeV. A gate region with a depth of about 2 μm is thereby formed. It has also been confirmed that applying a reverse voltage to the gate electrode in a junction field-effect transistor formed in this manner causes the channels to be blocked and the transistor to be turned off. Specifically, it has been confirmed that normally-on type characteristics are exhibited so that the junction field-effect transistor is turned off when a negative voltage is applied to the gate electrode.
There is high demand for power devices that turn off when an abnormality causes a control signal to the gate to be cut off. An important condition of such power devices is that they have normally-off type characteristics. In the aforementioned publication (Research & Development Association for Future Electron Devices, “2002 Report on the Results Commissioned by the New Energy and Industrial Technology Development Organization, Development of Ultralow-loss Power Devices Technology, Element Processing Technology”), a gate depth of about 2 μm was obtained, but the junction field-effect transistor had normally-on type characteristics. In view of this, a need exists for deeper gates to be formed in order to make the transition from normally-on characteristics, in which a negative voltage is applied to the gate to turn the device off, to normally-off characteristics, in which the device can be kept off at a gate voltage of 0 V. In order to form a deeper gate region as a selectively electroconductive region, ions of higher energy must be implanted. However, in cases in which a conventional mask made of SiO2 or the like is used, the implantation of high-energy ions causes problems in that the ions pass through the mask and are implanted in regions other than the openings in the mask. Another problem is that the gate region may be contaminated because the SiC is exposed through the openings in the mask, and the quality of the selectively electroconductive region may be reduced.
Therefore, a need exists for an ion implantation mask that can be used to form deeper selectively electroconductive regions and to yield higher-quality selectively electroconductive regions than in conventional practice; for a manufacturing method thereof; for a silicon carbide semiconductor device that uses this ion implantation mask; and a manufacturing method thereof.